Parasitically powered electronic devices derive their power from the power transmitted over an attached data line. Generally, when the attached data line is at a high voltage, a capacitor on the electronic device (an "on-board power storage capacitor") is charged to the data line's potential. When the data goes to a low voltage, such as during communication, the device can no longer derive its power from the data line potential, therefore it is usually powered by the onboard power storage capacitor.
Parasitically powered electronic devices must be designed to minimize power consumption while the data line is at a low potential, so that the on-board power storage capacitor does not discharge too much, which could cause device circuitry to reset.
Current electronic design practices have brought the power consumption of many elements or parts to a very low level. The minimum power consumption level of any given device is determined at least in part by the amount of leakage current that flows through reverse-biased PN silicon diodes that are present on every MOSFET on the device. Since the reverse leakage current is proportional to the area of PN diode junctions, the smaller the area of the PN diode junctions, the lower the reverse leakage current. However, there is a limit as to how small the area of the PN diode junctions can be made, and further, even with the smallest PN diode junction area, the reverse leakage current increases exponentially with increased temperature.
In circumstances when the area of the PN diode junctions cannot be minimized or when the device is to function at high temperatures, such as when the device is designed to serve as a thermometer, the reverse leakage current that results often is too high, causing undesired power drain of the on-board power storage capacitor.